Reduced Instruction Set Computer (RISC) architecture explained

Abstraction is a very important concept in our society.
RISC (Reduced Instruction Set Computer) architecture is an instruction set design that focuses to reduce the number of cycles per instruction

The key points of RISC architecture are:

  • Emphasis on software
  • Single-clock, reduced instruction only
  • Register to register: "LOAD" and "STORE" are independent instructions
  • Low cycles per second
  • large code sizes
  • Spends more transistors on memory registers

Read this article to understand the intuition behind RISC architecture

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